According to HKEPC, AMD will be commercializing the first QuadCore Opteron CPUs in the second half of 2007. CPU production will be located in the Dresden plant and the codename for this Opteron incarnation is Deerhound. 65nm technology will be used for its production.
This new CPU will use Socket F at 1207 pin and will have a unified L2 cache for all cores. This would introduce a novelty in current AMD cpu architecture, considering the fact that current dual core AMD generations integrate independent L2 caches for each core.
During 2008 AMD is set to introduce another cpu codenamed Greyhound, which will introduce support to HT 3.0 and DDR3 memory, maintaining shared L2 cache among the individual cores. We will also be seeing Cadiz with similar characteristics to Grayhound. Zamora will be a version similar to Cadiz but with support for FB-Dimm memory – Fully Buffered and HT 3.0 support. Zamora is likely to introduce L3 shared cache.
News source: HKEPC